ICE-T: RC: Orchestration and Reconfiguration Control Architecture for Software Defined Radios

Project Details


Wireless networks have grown enormously during the past 30 years, impacting numerous industries, including telecommunications, emergency response, and entertainment. Wireless advances could radically change several industries in the near future, including manufacturing, the automotive industry, healthcare, assisted living, public events, home automation, and utilities. However, each industry has different, often opposing, wireless demands. Manufacturing often requires a low data rate, ultra-low latency closed loop communication between machines, while emerging augmented reality interactions between people have much larger large data volumes, but can tolerate higher latency. Today, applications and services are constrained to a handful of wireless technologies, such as 4G, Wi-Fi and Bluetooth, because developing and modifying new radio protocols requires many man-years. The challenge for the wireless community is to enable wireless networks the same flexibility as regular computing devices, such as laptops or phones, where the same hardware supports a near infinite variety of behaviors realized in software. Flexibility at the wireless level has lagged as radios have been implemented as fixed-function circuits, in order to minimize marginal cost, energy use, and network latency. Enabling such flexibility would open opportunities for new wireless functions in diverse application domains.

While the emerging field of Software-Defined Radio (SDR) has made progress toward this vision, recent results have shown that traditional SDRs suffer serious limitations. The main problem is the slower sequential execution, even when using multicore central processing units (CPUs) or graphics processing units (GPUs), in contrast to the fast execution and high parallelization in application-specific integrated circuits (ASICs)or field-programmable gate arrays (FPGAs). This research will explore and evaluate a new software abstraction, Dynamic Blocks (DB), which will realize many software abstractions in an SDR FPGA, including procedure calls, recursion, queuing, dynamic routing, shared memory and matrix algebra. Realizing these abstractions in FPGAs will allow developers to rapidly try new designs or modify existing ones while meeting real-time latency and low energy requirements. The project will use millimeter-wave (mmWave) scenarios to evaluate real-time SDRs programmed using DBs. The SDRs available in the ORBIT testbed at Rutgers University, and the future mmWave capable equipment from the recently-funded COSMOS platform and European Union partners would be the target platforms for this research.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Effective start/end date10/1/189/30/21


  • National Science Foundation: $316,000.00


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