1000-V 9.1-mΩ · cm2 normally off 4H-SiC lateral RESURF JFET for power integrated circuit applications

Yongxi Zhang, Kuang Sheng, Ming Su, Jian H. Zhao, Petre Alexandrov, Leonid Fursin

Research output: Contribution to journalArticlepeer-review

28 Scopus citations

Abstract

A 4H-SiC normally off vertical channel lateral reduced-surface electric-field (RESURF) junction field-effect transistor (JFET) with a blocking voltage Vbr of 1028 V and a specific on-resistance Ron-sp of 9.1 mΩ · cm2 has been experimentally demonstrated. The device has a Vbr2/Ron-sp figure-of-merit of 116 MW/cm2, which is the highest value achieved to date on a 4H-SiC lateral power transistor. Also reported is a larger JFET that is capable of handling over 0.5-A current on an active area of 4.01 × 10-3 cm2. The fabricated double-RESURF devices have a vertical channel length of 1.8 μm, created by tilted aluminum (Al) implantation on the sidewalls of deep trenches, and a lateral drift-region length of 7.5 μm. In addition, low-voltage logic-inverter circuits based on the same lateral JFET process have been monolithically integrated on the same chip. Proper logic-inverter function has also been demonstrated.

Original languageEnglish (US)
Pages (from-to)404-407
Number of pages4
JournalIEEE Electron Device Letters
Volume28
Issue number5
DOIs
StatePublished - May 2007

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Keywords

  • Junction field-effect transistor (JFET)
  • Normally off
  • Power integrated circuits
  • Reduced-surface electric-field (RESURF) effect
  • Silicon carbide (SiC)

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