A hardware architecture for dynamic performance and energy adaptation

Phillip Stanley-Marbell, Michael S. Hsiao, Ulrich Kremer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Scopus citations

Abstract

Energy consumption of any component in a system may sometimes constitute just a small percentage of that of the overall system, making it necessary to address the issue of energy efficiency across the entire range of system components, from memory, to the CPU, to peripherals. Presented is a hardware architecture for detecting regions of application execution at runtime, for which there is opportunity to run a device at a slightly lower performance level, by reducing the operating frequency and voltage, to save energy. The proposed architecture, the Power Adaptation Unit (PAU) may be used to control the operating voltage of various system components, ranging from the CPU core, to memory and peripherals. An evaluation of the tradeoffs in performance versus energy savings and hardware cost of the PAU is conducted, along with results on its efficacy for a set of benchmarks. It is shown that on the average, a single entry PAU provides energy savings of 27%, with a corresponding performance degradation of 0.75% for the SPEC CPU 2000 integer and floating point benchmarks investigated.

Original languageEnglish (US)
Title of host publicationPower-Aware Computer Systems - 2nd International Workshop, PACS 2002, Revised Papers
EditorsBabak Falsafi, T.N. Vijaykumar
PublisherSpringer Verlag
Pages33-52
Number of pages20
ISBN (Print)3540010289, 9783540010289
DOIs
StatePublished - 2003
Event2nd International Workshop on Power-Aware Computer Systems, PACS 2002 - Cambridge, United States
Duration: Feb 2 2002Feb 2 2002

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume2325
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other2nd International Workshop on Power-Aware Computer Systems, PACS 2002
Country/TerritoryUnited States
CityCambridge
Period2/2/022/2/02

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)

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