Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications

Bo Yuan; Li Li; Jin Sha; Zhongfeng Wang

doi:10.1109/ISCAS.2009.5118354

Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications

Bo Yuan, Li Li, Jin Sha, Zhongfeng Wang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

With the extensive applications in high-speed communication systems, the current high-throughput Reed-Solomon decoders are required to achieve the target data rates from 10 Gb/s to 100 Gb/s with low hardware complexity. In this paper, pipeline interleaving inversionless Berlekamp-Massey PI-iBM) algorithm and pipeline interleaving reformulated inversionless Berlekamp-Massey (PI-RiBM) algorithms for decoding Reed-Solomon codes are presented. Based on these two new algorithms PI-iBM and PI-RiBM Reed-Solomon decoders targeted at 10-100 Gb/s applications are developed. Compared with previously published works, the proposed designs can achieve very high throughput with relatively low hardware complexity. Thus they are well suited for modern high data rate communication systems.

Original language	English (US)
Title of host publication	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages	2681-2684
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2009.5118354
State	Published - 2009
Externally published	Yes
Event	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan, Province of China Duration: May 24 2009 → May 27 2009

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Country/Territory	Taiwan, Province of China
City	Taipei
Period	5/24/09 → 5/27/09

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2009.5118354

Cite this

@inproceedings{ebe25724f5bf44a3b286a2e7337ae64f,

title = "Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications",

abstract = "With the extensive applications in high-speed communication systems, the current high-throughput Reed-Solomon decoders are required to achieve the target data rates from 10 Gb/s to 100 Gb/s with low hardware complexity. In this paper, pipeline interleaving inversionless Berlekamp-Massey PI-iBM) algorithm and pipeline interleaving reformulated inversionless Berlekamp-Massey (PI-RiBM) algorithms for decoding Reed-Solomon codes are presented. Based on these two new algorithms PI-iBM and PI-RiBM Reed-Solomon decoders targeted at 10-100 Gb/s applications are developed. Compared with previously published works, the proposed designs can achieve very high throughput with relatively low hardware complexity. Thus they are well suited for modern high data rate communication systems.",

author = "Bo Yuan and Li Li and Jin Sha and Zhongfeng Wang",

year = "2009",

doi = "10.1109/ISCAS.2009.5118354",

language = "English (US)",

isbn = "9781424438280",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "2681--2684",

booktitle = "2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009",

note = "2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 ; Conference date: 24-05-2009 Through 27-05-2009",

}

Yuan, B, Li, L, Sha, J & Wang, Z 2009, Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications. in 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009., 5118354, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2681-2684, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei, Taiwan, Province of China, 5/24/09. https://doi.org/10.1109/ISCAS.2009.5118354

TY - GEN

T1 - Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications

AU - Yuan, Bo

AU - Li, Li

AU - Sha, Jin

AU - Wang, Zhongfeng

PY - 2009

Y1 - 2009

N2 - With the extensive applications in high-speed communication systems, the current high-throughput Reed-Solomon decoders are required to achieve the target data rates from 10 Gb/s to 100 Gb/s with low hardware complexity. In this paper, pipeline interleaving inversionless Berlekamp-Massey PI-iBM) algorithm and pipeline interleaving reformulated inversionless Berlekamp-Massey (PI-RiBM) algorithms for decoding Reed-Solomon codes are presented. Based on these two new algorithms PI-iBM and PI-RiBM Reed-Solomon decoders targeted at 10-100 Gb/s applications are developed. Compared with previously published works, the proposed designs can achieve very high throughput with relatively low hardware complexity. Thus they are well suited for modern high data rate communication systems.

AB - With the extensive applications in high-speed communication systems, the current high-throughput Reed-Solomon decoders are required to achieve the target data rates from 10 Gb/s to 100 Gb/s with low hardware complexity. In this paper, pipeline interleaving inversionless Berlekamp-Massey PI-iBM) algorithm and pipeline interleaving reformulated inversionless Berlekamp-Massey (PI-RiBM) algorithms for decoding Reed-Solomon codes are presented. Based on these two new algorithms PI-iBM and PI-RiBM Reed-Solomon decoders targeted at 10-100 Gb/s applications are developed. Compared with previously published works, the proposed designs can achieve very high throughput with relatively low hardware complexity. Thus they are well suited for modern high data rate communication systems.

UR - http://www.scopus.com/inward/record.url?scp=70350151780&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=70350151780&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2009.5118354

DO - 10.1109/ISCAS.2009.5118354

M3 - Conference contribution

AN - SCOPUS:70350151780

SN - 9781424438280

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 2681

EP - 2684

BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009

T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009

Y2 - 24 May 2009 through 27 May 2009

ER -

Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications

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