Area-efficient reed-solomon decoder design for optical communications

Bo Yuan, Zhongfeng Wang, Li Li, Minglun Gao, Jin Sha, Chuan Zhang

Research output: Contribution to journalArticlepeer-review

28 Scopus citations


A high-speed low-complexity Reed-Solomon (RS) decoder architecture based on the recursive degree computationless modified Euclidean (rDCME) algorithm is presented in this brief. The proposed architecture has very low hardware complexity compared with the conventional modified Euclidean and degree computationless modified Euclidean (DCME) architectures, since it can reduce the degree computation circuitry and replace the conventional systolic architecture that uses many processing elements (PEs) with a recursive architecture using a single PE. A high-throughput data rate is also facilitated by employing a pipelining technique. The proposed rDCME architecture has been designed and implemented using SMIC 0.18-μ CMOS technology. Synthesized results show that the proposed RS (255, 239) decoder requires only about 18K gates and can operate at 640 MHz to achieve a throughput of 5.1 Gb/s, which meets the requirement of modern high-speed optical communications.

Original languageEnglish (US)
Pages (from-to)469-473
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number6
StatePublished - 2009
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


  • Degree computationless
  • Error-correction codes
  • Modified Euclidean (ME) algorithm
  • Optical communications
  • Recursive
  • Reed-Solomon (RS) decoder

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