Area-efficient scaling-free DFT/FFT design using stochastic computing

Bo Yuan, Yanzhi Wang, Zhongfeng Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Among various discrete transforms, discrete Fourier transformation (DFT) is the most important technique that performs Fourier analysis in various practical applications, such as digital signal processing, wireless communications, to name a few. Due to its ultra-high computing complexity as O(N2), in practice the N-point DFT is usually performed in the form of fast Fourier transformation (FFT) with complexity as O(NlogN). Despite this significant reduction in computing complexity, the hardware cost of the multiplication-intensive N-point FFT is still very prohibitive; especially for many large-scale applications that requires large N.

Original languageEnglish (US)
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages1
ISBN (Electronic)9781479953400
DOIs
StatePublished - Jul 29 2016
Externally publishedYes
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: May 22 2016May 25 2016

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2016-July
ISSN (Print)0271-4310

Other

Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
CountryCanada
CityMontreal
Period5/22/165/25/16

Fingerprint

Fourier analysis
Digital signal processing
Discrete Fourier transforms
Hardware
Communication
Costs

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Yuan, B., Wang, Y., & Wang, Z. (2016). Area-efficient scaling-free DFT/FFT design using stochastic computing. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems [7539207] (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2016-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2016.7539207
Yuan, Bo ; Wang, Yanzhi ; Wang, Zhongfeng. / Area-efficient scaling-free DFT/FFT design using stochastic computing. ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 2016. (Proceedings - IEEE International Symposium on Circuits and Systems).
@inproceedings{dfeaad8b04cc46c799b9da6aa8bcb49d,
title = "Area-efficient scaling-free DFT/FFT design using stochastic computing",
abstract = "Among various discrete transforms, discrete Fourier transformation (DFT) is the most important technique that performs Fourier analysis in various practical applications, such as digital signal processing, wireless communications, to name a few. Due to its ultra-high computing complexity as O(N2), in practice the N-point DFT is usually performed in the form of fast Fourier transformation (FFT) with complexity as O(NlogN). Despite this significant reduction in computing complexity, the hardware cost of the multiplication-intensive N-point FFT is still very prohibitive; especially for many large-scale applications that requires large N.",
author = "Bo Yuan and Yanzhi Wang and Zhongfeng Wang",
year = "2016",
month = "7",
day = "29",
doi = "10.1109/ISCAS.2016.7539207",
language = "English (US)",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",
address = "United States",

}

Yuan, B, Wang, Y & Wang, Z 2016, Area-efficient scaling-free DFT/FFT design using stochastic computing. in ISCAS 2016 - IEEE International Symposium on Circuits and Systems., 7539207, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2016-July, Institute of Electrical and Electronics Engineers Inc., 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada, 5/22/16. https://doi.org/10.1109/ISCAS.2016.7539207

Area-efficient scaling-free DFT/FFT design using stochastic computing. / Yuan, Bo; Wang, Yanzhi; Wang, Zhongfeng.

ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 2016. 7539207 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2016-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Area-efficient scaling-free DFT/FFT design using stochastic computing

AU - Yuan, Bo

AU - Wang, Yanzhi

AU - Wang, Zhongfeng

PY - 2016/7/29

Y1 - 2016/7/29

N2 - Among various discrete transforms, discrete Fourier transformation (DFT) is the most important technique that performs Fourier analysis in various practical applications, such as digital signal processing, wireless communications, to name a few. Due to its ultra-high computing complexity as O(N2), in practice the N-point DFT is usually performed in the form of fast Fourier transformation (FFT) with complexity as O(NlogN). Despite this significant reduction in computing complexity, the hardware cost of the multiplication-intensive N-point FFT is still very prohibitive; especially for many large-scale applications that requires large N.

AB - Among various discrete transforms, discrete Fourier transformation (DFT) is the most important technique that performs Fourier analysis in various practical applications, such as digital signal processing, wireless communications, to name a few. Due to its ultra-high computing complexity as O(N2), in practice the N-point DFT is usually performed in the form of fast Fourier transformation (FFT) with complexity as O(NlogN). Despite this significant reduction in computing complexity, the hardware cost of the multiplication-intensive N-point FFT is still very prohibitive; especially for many large-scale applications that requires large N.

UR - http://www.scopus.com/inward/record.url?scp=84983434108&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84983434108&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2016.7539207

DO - 10.1109/ISCAS.2016.7539207

M3 - Conference contribution

AN - SCOPUS:84983434108

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - ISCAS 2016 - IEEE International Symposium on Circuits and Systems

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Yuan B, Wang Y, Wang Z. Area-efficient scaling-free DFT/FFT design using stochastic computing. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc. 2016. 7539207. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2016.7539207