TY - JOUR
T1 - BiCMOS-Based Compensation
T2 - Toward Fully Curvature-Corrected Bandgap Reference Circuits
AU - Huang, Yi
AU - Zhu, Li
AU - Kong, Fanpeng
AU - Cheung, Chun
AU - Najafizadeh, Laleh
N1 - Funding Information:
Manuscript received June 14, 2017; revised July 28, 2017; accepted August 1, 2017. Date of publication August 24, 2017; date of current version March 9, 2018. This work was supported in part by the National Science Foundation under Award 1408202. This paper was recommended by Associate Editor N. Krishnapura. (Corresponding author: Laleh Najafizadeh.) Y. Huang is with the Department of Electrical and Computer Engineering, Rutgers University, Piscataway, NJ 08854 USA, and also with Intersil Corporation, Bridgewater, NJ 08807 USA (e-mail: yhuang85@rutgers.edu).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2018/4
Y1 - 2018/4
N2 - We present a novel BiCMOS-based temperature compensation technique aiming at complete correction of the curvature in the temperature response of bandgap references. The source of the appearance of this curvature is because the well-known nonlinear term Tln (T) in the base-emitter voltage (VBE ) is not completely canceled across all temperature points. Here, we show that the gate-source voltage (VGS) of a subthreshold-operating MOSFET, biased with a proportional to absolute temperature current, also exhibits the T\ln (T) nonlinear temperature dependence. We leverage the existence of T\ln (T) in the temperature response of VGS to directly cancel the nonlinear term T\ln (T) in VBE. A theoretical analysis of the proposed compensation approach is presented. As a proof of concept, a current-mode voltage reference circuit, utilizing the proposed approach, is designed in IBM's 8HP Silicon-Germanium (SiGe) BiCMOS technology. Thermal characteristics of the compensation components are examined through extensive simulations and are also experimentally evaluated, for the first time. Measurement results of the reference circuit show that the circuit outperforms the temperature performance of the state-of-the-art SiGe reference circuits. Possible origins of observed temperature dependences and mitigation techniques are discussed. The proposed compensation approach can be realized in any BiCMOS/CMOS technology for implementing either current-mode or voltage-mode high precision reference circuits.
AB - We present a novel BiCMOS-based temperature compensation technique aiming at complete correction of the curvature in the temperature response of bandgap references. The source of the appearance of this curvature is because the well-known nonlinear term Tln (T) in the base-emitter voltage (VBE ) is not completely canceled across all temperature points. Here, we show that the gate-source voltage (VGS) of a subthreshold-operating MOSFET, biased with a proportional to absolute temperature current, also exhibits the T\ln (T) nonlinear temperature dependence. We leverage the existence of T\ln (T) in the temperature response of VGS to directly cancel the nonlinear term T\ln (T) in VBE. A theoretical analysis of the proposed compensation approach is presented. As a proof of concept, a current-mode voltage reference circuit, utilizing the proposed approach, is designed in IBM's 8HP Silicon-Germanium (SiGe) BiCMOS technology. Thermal characteristics of the compensation components are examined through extensive simulations and are also experimentally evaluated, for the first time. Measurement results of the reference circuit show that the circuit outperforms the temperature performance of the state-of-the-art SiGe reference circuits. Possible origins of observed temperature dependences and mitigation techniques are discussed. The proposed compensation approach can be realized in any BiCMOS/CMOS technology for implementing either current-mode or voltage-mode high precision reference circuits.
KW - BiCMOS
KW - Silicon-germanium (SiGe)
KW - bandgap voltage reference (BGR)
KW - curvature compensation
KW - heterojunction bipolar transistors (HBTs)
KW - subthreshold
KW - temperature coefficient (TC)
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U2 - 10.1109/TCSI.2017.2736062
DO - 10.1109/TCSI.2017.2736062
M3 - Article
AN - SCOPUS:85028692192
SN - 1549-8328
VL - 65
SP - 1210
EP - 1223
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 4
ER -