Buried Channel MOSFET's with Gate Lengths from 2.5 μm to 700 Â

R. E. Howard, L. D. Jackel, R. G. Swartz, P. Grabbe, V. D. Archer, R. W. Epworth, E. L. Hu, D. M. Tennant, A. M. Voshchenkov

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

High resolution electron beam lithography has been used to fabricate ion implanted buried channel MOSFET's with gate lengths ranging from 0.4 μm to 700 Â. Similar devices were also fabricated on the same chip using optical lithography with gate lengths of 2.5 μm. These devices include some with the smallest lithographically defined gates ever made in silicon; similar devices should help define the limits to miniaturization in semiconducting devices.

Original languageEnglish (US)
Pages (from-to)322-324
Number of pages3
JournalIEEE Electron Device Letters
Volume3
Issue number10
DOIs
StatePublished - Oct 1982
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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