Cellular supercomputing with system-on-a-chip

G. Almasi; G. S. Almasi; D. Beece; R. Bellofatto; G. Bhanot; R. Bickford; M. Blumrich; A. A. Bright; J. Brunheroto; C. Cascaval; J. Castaños; L. Ceze; P. Coteus; S. Chatterjee; D. Chen; G. Chiu; T. M. Cipolla; P. Crumley; A. Deutsch; M. B. Dombrowa; W. Donath; M. Eleftheriou; B. Fitch; J. Gagliano; A. Gara; R. Germain; M. E. Giampapa; M. Gupta; F. Gustavson; S. Hall; R. A. Haring; D. Heidel; P. Heidelberger; L. M. Herger; D. Hoenicke; R. D. Jackson; T. Jamal-Eddine; G. V. Kopcsay; A. P. Lanzetta; D. Lieber; M. Lu; M. Mendell; L. Mok; J. Moreira; B. J. Nathanson; M. Newton; M. Ohmacht; R. Rand; R. Regan; R. Sahoo; A. Sanomiya; E. Schenfeld; S. Singh; P. Song; B. D. Steinmacher-Burow; K. Strauss; R. Swetz; T. Takken; P. Vranas; T. J.C. Ward; J. Brown; T. Liebsch; A. Schram; G. Ulsh

Cellular supercomputing with system-on-a-chip

G. Almasi, G. S. Almasi, D. Beece, R. Bellofatto, G. Bhanot, R. Bickford, M. Blumrich, A. A. Bright, J. Brunheroto, C. Cascaval, J. Castaños, L. Ceze, P. Coteus, S. Chatterjee, D. Chen, G. Chiu, T. M. Cipolla, P. Crumley, A. Deutsch, M. B. DombrowaW. Donath, M. Eleftheriou, B. Fitch, J. Gagliano, A. Gara, R. Germain, M. E. Giampapa, M. Gupta, F. Gustavson, S. Hall, R. A. Haring, D. Heidel, P. Heidelberger, L. M. Herger, D. Hoenicke, R. D. Jackson, T. Jamal-Eddine, G. V. Kopcsay, A. P. Lanzetta, D. Lieber, M. Lu, M. Mendell, L. Mok, J. Moreira, B. J. Nathanson, M. Newton, M. Ohmacht, R. Rand, R. Regan, R. Sahoo, A. Sanomiya, E. Schenfeld, S. Singh, P. Song, B. D. Steinmacher-Burow, K. Strauss, R. Swetz, T. Takken, P. Vranas, T. J.C. Ward, J. Brown, T. Liebsch, A. Schram, G. Ulsh

Research output: Contribution to journal › Conference article › peer-review

14 Scopus citations

Abstract

System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.

Original language	English (US)
Pages (from-to)	196-197+195
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
State	Published - 2002
Externally published	Yes
Event	2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States Duration: Feb 3 2002 → Feb 7 2002

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

Almasi, G., Almasi, G. S., Beece, D., Bellofatto, R., Bhanot, G., Bickford, R., Blumrich, M., Bright, A. A., Brunheroto, J., Cascaval, C., Castaños, J., Ceze, L., Coteus, P., Chatterjee, S., Chen, D., Chiu, G., Cipolla, T. M., Crumley, P., Deutsch, A., ... Ulsh, G. (2002). Cellular supercomputing with system-on-a-chip. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 196-197+195.

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title = "Cellular supercomputing with system-on-a-chip",

abstract = "System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.",

author = "G. Almasi and Almasi, {G. S.} and D. Beece and R. Bellofatto and G. Bhanot and R. Bickford and M. Blumrich and Bright, {A. A.} and J. Brunheroto and C. Cascaval and J. Casta{\~n}os and L. Ceze and P. Coteus and S. Chatterjee and D. Chen and G. Chiu and Cipolla, {T. M.} and P. Crumley and A. Deutsch and Dombrowa, {M. B.} and W. Donath and M. Eleftheriou and B. Fitch and J. Gagliano and A. Gara and R. Germain and Giampapa, {M. E.} and M. Gupta and F. Gustavson and S. Hall and Haring, {R. A.} and D. Heidel and P. Heidelberger and Herger, {L. M.} and D. Hoenicke and Jackson, {R. D.} and T. Jamal-Eddine and Kopcsay, {G. V.} and Lanzetta, {A. P.} and D. Lieber and M. Lu and M. Mendell and L. Mok and J. Moreira and Nathanson, {B. J.} and M. Newton and M. Ohmacht and R. Rand and R. Regan and R. Sahoo and A. Sanomiya and E. Schenfeld and S. Singh and P. Song and Steinmacher-Burow, {B. D.} and K. Strauss and R. Swetz and T. Takken and P. Vranas and Ward, {T. J.C.} and J. Brown and T. Liebsch and A. Schram and G. Ulsh",

year = "2002",

language = "English (US)",

pages = "196--197+195",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2002 IEEE International Solid-State Circuits Conference ; Conference date: 03-02-2002 Through 07-02-2002",

}

Almasi, G, Almasi, GS, Beece, D, Bellofatto, R, Bhanot, G, Bickford, R, Blumrich, M, Bright, AA, Brunheroto, J, Cascaval, C, Castaños, J, Ceze, L, Coteus, P, Chatterjee, S, Chen, D, Chiu, G, Cipolla, TM, Crumley, P, Deutsch, A, Dombrowa, MB, Donath, W, Eleftheriou, M, Fitch, B, Gagliano, J, Gara, A, Germain, R, Giampapa, ME, Gupta, M, Gustavson, F, Hall, S, Haring, RA, Heidel, D, Heidelberger, P, Herger, LM, Hoenicke, D, Jackson, RD, Jamal-Eddine, T, Kopcsay, GV, Lanzetta, AP, Lieber, D, Lu, M, Mendell, M, Mok, L, Moreira, J, Nathanson, BJ, Newton, M, Ohmacht, M, Rand, R, Regan, R, Sahoo, R, Sanomiya, A, Schenfeld, E, Singh, S, Song, P, Steinmacher-Burow, BD, Strauss, K, Swetz, R, Takken, T, Vranas, P, Ward, TJC, Brown, J, Liebsch, T, Schram, A & Ulsh, G 2002, 'Cellular supercomputing with system-on-a-chip', Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 196-197+195.

TY - JOUR

T1 - Cellular supercomputing with system-on-a-chip

AU - Almasi, G.

AU - Almasi, G. S.

AU - Beece, D.

AU - Bellofatto, R.

AU - Bhanot, G.

AU - Bickford, R.

AU - Blumrich, M.

AU - Bright, A. A.

AU - Brunheroto, J.

AU - Cascaval, C.

AU - Castaños, J.

AU - Ceze, L.

AU - Coteus, P.

AU - Chatterjee, S.

AU - Chen, D.

AU - Chiu, G.

AU - Cipolla, T. M.

AU - Crumley, P.

AU - Deutsch, A.

AU - Dombrowa, M. B.

AU - Donath, W.

AU - Eleftheriou, M.

AU - Fitch, B.

AU - Gagliano, J.

AU - Gara, A.

AU - Germain, R.

AU - Giampapa, M. E.

AU - Gupta, M.

AU - Gustavson, F.

AU - Hall, S.

AU - Haring, R. A.

AU - Heidel, D.

AU - Heidelberger, P.

AU - Herger, L. M.

AU - Hoenicke, D.

AU - Jackson, R. D.

AU - Jamal-Eddine, T.

AU - Kopcsay, G. V.

AU - Lanzetta, A. P.

AU - Lieber, D.

AU - Lu, M.

AU - Mendell, M.

AU - Mok, L.

AU - Moreira, J.

AU - Nathanson, B. J.

AU - Newton, M.

AU - Ohmacht, M.

AU - Rand, R.

AU - Regan, R.

AU - Sahoo, R.

AU - Sanomiya, A.

AU - Schenfeld, E.

AU - Singh, S.

AU - Song, P.

AU - Steinmacher-Burow, B. D.

AU - Strauss, K.

AU - Swetz, R.

AU - Takken, T.

AU - Vranas, P.

AU - Ward, T. J.C.

AU - Brown, J.

AU - Liebsch, T.

AU - Schram, A.

AU - Ulsh, G.

PY - 2002

Y1 - 2002

N2 - System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.

AB - System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.

UR - http://www.scopus.com/inward/record.url?scp=0036105874&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0036105874&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0036105874

SN - 0193-6530

SP - 196-197+195

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - 2002 IEEE International Solid-State Circuits Conference

Y2 - 3 February 2002 through 7 February 2002

ER -

Cellular supercomputing with system-on-a-chip

Abstract

All Science Journal Classification (ASJC) codes

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Cite this