Compiler-directed dynamic CPU frequency and voltage scaling

Chung Hsing Hsu, Ulrich Kremer

Research output: Chapter in Book/Report/Conference proceedingChapter

2 Citations (Scopus)

Abstract

This paper presents the design, implementation, and evaluation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage and frequency scaling (DVFS). The algorithm identifies program regions where the CPU can be slowed down with negligible performance loss, and has been implemented as a source-to-source level compiler transformation using the SUIF2 compiler infrastructure. Physical measurements on a notebook computer show that total system energy savings of up to 28% can be achieved with performance degradation of less than 5% for the SPEC CPU95 benchmarks. On average, the system energy and energy-delay product are reduced by 11% and 9%, respectively, with a performance slowdown of 2%.

Original languageEnglish (US)
Title of host publicationDesigning Embedded Processors
Subtitle of host publicationA Low Power Perspective
PublisherSpringer Netherlands
Pages305-323
Number of pages19
ISBN (Print)9781402058684
DOIs
StatePublished - Dec 1 2007

Fingerprint

Program processors
Laptop computers
Energy conservation
Degradation
Voltage scaling
Dynamic frequency scaling

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Keywords

  • compiler
  • dynamic voltage scaling
  • energy efficiency
  • power reduction

Cite this

Hsu, C. H., & Kremer, U. (2007). Compiler-directed dynamic CPU frequency and voltage scaling. In Designing Embedded Processors: A Low Power Perspective (pp. 305-323). Springer Netherlands. https://doi.org/10.1007/978-1-4020-5869-1_14
Hsu, Chung Hsing ; Kremer, Ulrich. / Compiler-directed dynamic CPU frequency and voltage scaling. Designing Embedded Processors: A Low Power Perspective. Springer Netherlands, 2007. pp. 305-323
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Hsu, CH & Kremer, U 2007, Compiler-directed dynamic CPU frequency and voltage scaling. in Designing Embedded Processors: A Low Power Perspective. Springer Netherlands, pp. 305-323. https://doi.org/10.1007/978-1-4020-5869-1_14

Compiler-directed dynamic CPU frequency and voltage scaling. / Hsu, Chung Hsing; Kremer, Ulrich.

Designing Embedded Processors: A Low Power Perspective. Springer Netherlands, 2007. p. 305-323.

Research output: Chapter in Book/Report/Conference proceedingChapter

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Hsu CH, Kremer U. Compiler-directed dynamic CPU frequency and voltage scaling. In Designing Embedded Processors: A Low Power Perspective. Springer Netherlands. 2007. p. 305-323 https://doi.org/10.1007/978-1-4020-5869-1_14