TY - JOUR
T1 - Development of 4H-SiC LJFET-based power IC
AU - Zhang, Yongxi
AU - Sheng, Kuang
AU - Su, Ming
AU - Zhao, Jian H.
AU - Alexandrov, Petre
AU - Li, Xueqing
AU - Fursin, Leonid
AU - Weiner, Maurice
N1 - Funding Information:
Manuscript received December 22, 2007; revised March 3, 2008. This work was supported in part by the NSF SBIR Phase I Award (Award IIP-0712018), managed by Dr. M. Nair, and in part by the DARPA/MTO RIPE Program (Dr. Mark Rosker) under Air Force Contract FA8650-05-C-7204 (Dr. George High). The review of this paper was arranged by Editor J. Cooper.
PY - 2008
Y1 - 2008
N2 - A novel lateral junction field-effect transistor (JFET)-based power IC technology in 4H-SiC is presented in detail covering device and circuit design, fabrication, and characterization. The optimal reduced surface field design for the lateral power JFET has been carried out and implemented in the IC fabrication. Since this technology has great promise at high temperatures, the temperature dependences (from room temperature to 300 °C) of the threshold voltage, transconductance, resistance, and electron mobility have been fully characterized. Advantages of the SiC vertical-channel lateral JFET (VC-LJFET) technology, such as lower output capacitance (COSS) for lateral power JFETs and adjustable threshold voltages at mask design level, are also discussed. Finally, a monolithic power IC chip integrating a power lateral JFET with its low-voltage buffers is presented, which demonstrated megahertz switching at a power level of 270 W. The successful development of the VC-LJFET technology should hasten the introduction of SiC smart power ICs and eventually the system-on-a-chip applications in harsh environments.
AB - A novel lateral junction field-effect transistor (JFET)-based power IC technology in 4H-SiC is presented in detail covering device and circuit design, fabrication, and characterization. The optimal reduced surface field design for the lateral power JFET has been carried out and implemented in the IC fabrication. Since this technology has great promise at high temperatures, the temperature dependences (from room temperature to 300 °C) of the threshold voltage, transconductance, resistance, and electron mobility have been fully characterized. Advantages of the SiC vertical-channel lateral JFET (VC-LJFET) technology, such as lower output capacitance (COSS) for lateral power JFETs and adjustable threshold voltages at mask design level, are also discussed. Finally, a monolithic power IC chip integrating a power lateral JFET with its low-voltage buffers is presented, which demonstrated megahertz switching at a power level of 270 W. The successful development of the VC-LJFET technology should hasten the introduction of SiC smart power ICs and eventually the system-on-a-chip applications in harsh environments.
KW - High-temperature electronics
KW - Junction fieldeffect transistor (JFET)
KW - Normally off
KW - Power integrated circuits
KW - Reduced surface electric field (RESURF) effect
KW - Silicon carbide (SiC)
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U2 - 10.1109/TED.2008.926676
DO - 10.1109/TED.2008.926676
M3 - Article
AN - SCOPUS:49249134576
SN - 0018-9383
VL - 55
SP - 1934
EP - 1945
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 8
ER -