Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?

Eddy Z. Zhang, Yunlian Jiang, Xipeng Shen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

63 Scopus citations

Abstract

Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also results in cache contention. A number of studies have examined the influence of cache sharing on multithreaded applications, but most of them have concentrated on the design or management of shared cache, rather than a systematic measurement of the influence. Consequently, prior measurements have been constrained by the reliance on simulators, the use of out-of-date benchmarks, and the limited coverage of deciding factors. The influence of CMP cache sharing on contemporary multithreaded applications remains preliminarily understood. In this work, we conduct a systematic measurement of the influence on two kinds of commodity CMP machines, using a recently released CMP benchmark suite, PARSEC, with a number of potentially important factors on program, OS, and architecture levels considered. The measurement shows some surprising results. Contrary to commonly perceived importance of cache sharing, neither positive nor negative effects from the cache sharing are significant for most of the program executions, regardless of the types of parallelism, input datasets, architectures, numbers of threads, and assignments of threads to cores. After a detailed analysis, we find that the main reason is the mismatch of current development and compilation of multithreaded applications and CMP architectures. By transforming the programs in a cache-sharing-aware manner, we observe up to 36% performance increase when the threads are placed on cores appropriately.

Original languageEnglish (US)
Title of host publicationPPoPP'10 - Proceedings of the 2010 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
Pages203-212
Number of pages10
DOIs
StatePublished - Mar 15 2010
Externally publishedYes
Event2010 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP'10 - Bangalore, India
Duration: Jan 9 2010Jan 14 2010

Publication series

NameProceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Other

Other2010 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP'10
CountryIndia
CityBangalore
Period1/9/101/14/10

All Science Journal Classification (ASJC) codes

  • Software

Keywords

  • Chip multiprocessors
  • Parallel program optimizations
  • Shared cache
  • Thread scheduling

Fingerprint Dive into the research topics of 'Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?'. Together they form a unique fingerprint.

Cite this