@inproceedings{c7cade0d9d7e47a58979b495f73a0011,
title = "Engineering substrates for 3d integration of iii-v and CMOS",
abstract = "Our direct growth approach of integrating compound semiconductors (CS) and silicon CMOS is based on a unique silicon template wafer with an embedded CS template layer of Germanium (Ge). It enables selective placement of CS devices in arbitrary locations on a Silicon CMOS wafer for simple, high yield, monolithic integration and optimal circuit performance. HBTs demonstrate a peak current gain cutoff frequency ft over 200 GHz. To the best of our knowledge this represents the first demonstration of an InP-based HBT fabricated on a silicon wafer.",
author = "Herrick, {K. J.} and Kazior, {T. E.} and J. Laroche and Liu, {A. W.K.} and D. Lubyshev and Fastenau, {J. M.} and M. Urteaga and W. Ha and J. Bergman and B. Brar and Bulsara, {M. T.} and Fitzgerald, {E. A.} and D. Clark and D. Smith and Thompson, {R. F.} and N. Daval and Celler, {G. K.}",
note = "Funding Information: ACKNOWLEDGEMENT This work was financially supported by the Instrument Developing Project of the Chinese Academy of Sciences (YZ201161), the National Natural Science Foundation of China (41206087, 20977073), and the Taishan Scholar Program of Shandong Province (TS20081159). Funding Information: This work was financially supported by the Instrument Developing Project of the Chinese Academy of Sciences (YZ201161), the National Natural Science Foundation of China (41206087, 20977073), and the Taishan Scholar Program of Shandong Province (TS20081159).; Semiconductor Wafer Bonding 10: Science, Technology, and Applications - 214th ECS Meeting ; Conference date: 14-10-2008 Through 16-10-2008",
year = "2009",
doi = "10.1149/1.2982873",
language = "English (US)",
isbn = "9781566776547",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "8",
pages = "227--234",
booktitle = "ECS Transactions - Semiconductor Wafer Bonding 10",
edition = "8",
}