High Q series negative capacitor using negative group delay circuit based on a stepped-impedance distributed amplifier

This paper presents a novel approach to achieve a high Q series negative capacitor (NC). A stepped-impedance distributed amplifier (DA) is used to achieve the negative group delay (NGD) response. The input/output (I/O) impedance of the transistor in each stage is calculated to meet the specific voltage gain coefficient ratio. By this way, the NGD phenomenon can be observed between the input and reversed output ports of DA. A major advantage of this architecture is that the gain is configurable while maintaining a fixed NGD. By properly choosing the gain coefficient, the proposed circuit can exhibit the same S21 as an ideal NC network. From the experimental results, it can be calculated that in 1.4-1.55 GHz the NGD circuit can exhibit the desired equivalent NC value. In addition, thanks to the active structure, the circuit shows a high quality-factor (Q) performance.