Intermixing at the tantalum oxide/silicon interface in gate dielectric structures

Metal oxides with high dielectric constants have the potential to extend scaling of transistor gate capacitance beyond that of ultrathin silicon dioxide. However, during deposition of most metal oxides on silicon, an interfacial region of SiO_x can form that limits the specific capacitance of the gate structure. We have examined the composition of this layer using high-resolution depth profiling of medium ion energy scattering combined with infrared spectroscopy and transmission electron microscopy. We find that the interfacial region is not pure SiO₂, but is a complex depth-dependent ternary oxide of Si-Ta_x-O_y with a dielectric constant at least twice that of pure SiO₂ as inferred from electrical measurements. High-temperature annealing crystallizes the Ta₂O₅ film and converts the composite oxide to a more pure SiO₂ layer with a lower capacitance density. Using low postanneal temperatures, a stable composite oxide structure can be obtained with good electrical properties and an effective SiO₂ thickness of less than 2 nm with ∼10 nm of composite oxide.