TY - GEN
T1 - Multi-input/multi-output relay design for more compact and versatile implementation of digital logic with zero leakage
AU - Nathanael, Rhesa
AU - Jeon, Jaeseok
AU - Chen, I. Ru
AU - Chen, Yenhao
AU - Chen, Fred
AU - Kam, Hei
AU - Liu, Tsu Jae King
PY - 2012
Y1 - 2012
N2 - Multi-functional digital logic circuits, each utilizing only two relays, are demonstrated for the first time. This work can be extended to relay designs comprising greater than two input electrodes and/or greater than two sets of source/drain electrodes, for more compact realization of zero-leakage digital ICs in the future.
AB - Multi-functional digital logic circuits, each utilizing only two relays, are demonstrated for the first time. This work can be extended to relay designs comprising greater than two input electrodes and/or greater than two sets of source/drain electrodes, for more compact realization of zero-leakage digital ICs in the future.
UR - http://www.scopus.com/inward/record.url?scp=84863702077&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84863702077&partnerID=8YFLogxK
U2 - 10.1109/VLSI-TSA.2012.6210115
DO - 10.1109/VLSI-TSA.2012.6210115
M3 - Conference contribution
AN - SCOPUS:84863702077
SN - 9781457720840
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
BT - 2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012 - Proceedings of Technical Papers
T2 - 2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012
Y2 - 23 April 2012 through 25 April 2012
ER -