Observation of threshold-voltage instability in single-crystal silicon TFTs on flexible plastic substrate

Hao Chih Yuan, George K. Celler, Zhenqiang Ma

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Abstract

We report the first observation of threshold-voltage instability of single-crystal silicon (Si) thin-film transistors (TFTs) that are fabricated on low-temperature flexible plastic substrate. Single-crystal Si of 200-nm thickness is transferred from silicon-on-insulator (SOI) onto an indium-tin-oxide-coated polyethylene terephthalate host substrate after selectively removing the buried-oxide layer from the SOI. TFTs of n-type were then fabricated on the transferred single-crystal Si layer with 1.8-μm thick SU-8-2 epoxy as the gate dielectric layer. It is observed that the threshold voltage (Vth) of these TFTs shifts to higher and lower values under high positive and negative gate-voltage stress, respectively. A logarithmic time-dependence of the Vth shift at high bias stress was clearly indicated. These results suggest that the instability of the threshold voltage of the single-crystal Si TFTs is attributed to the charge trapping in the gate dielectric layer.

Original languageEnglish (US)
Pages (from-to)590-592
Number of pages3
JournalIEEE Electron Device Letters
Volume28
Issue number7
DOIs
Publication statusPublished - Jul 1 2007
Externally publishedYes

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All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Keywords

  • Buried oxide (BOX)
  • Gate dielectric
  • Polyethylene terephthalate (PET)
  • SU-8
  • Silicon (Si)
  • Silicon-on-insulator (SOI)
  • Thin-film transistor (TFT)
  • Threshold voltage (V

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