This paper presents an approach to find the optimal design layout of chips on a circuit board in a manner that minimizes the area covered on the board and the connections between the various chips. In addition, there are no major heat sources next to each other and certain physical constraints are satisfied while finding a layout design. In this approach, the whole circuit board area is divided into a finite number of cells for mapping it into a genetic algorithm chromosome. The mutation and crossover operators have been modified and are applied in conjunction with connectivity analysis for the chips to reduce the creation of a lot of faulty generations. Examples of GA based chip layout are presented to show how each of the objectives are attained separately followed by examples to arrive at layouts using multiple objectives.