Abstract
This paper presents a hardware isolation mechanism to protect secret information in third party IP cores subject to hardware Trojan attacks. We first implement the hardware Trojan threat model in commonly used third party IP cores, such as multiplier and RSA, which leak confidential information from the hardware under rarely triggered conditions. Then, we develop a hardware isolation-based security mechanism to trap the leaked data in the isolated secure environment, which prevents the attacker from unauthorized access to the data in the normal operation mode. We implement both the threat model and defense approach on an Xilinx Zynq SoC equipped with ARM processor. Based on the real hardware prototype, we conduct security and performance evaluations and prove the effectiveness of the proposed approach.
Original language | English (US) |
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Article number | 7805221 |
Pages (from-to) | 253-261 |
Number of pages | 9 |
Journal | IEEE Transactions on Emerging Topics in Computing |
Volume | 7 |
Issue number | 2 |
DOIs | |
State | Published - 2019 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- Computer Science (miscellaneous)
- Information Systems
- Human-Computer Interaction
- Computer Science Applications
Keywords
- Hardware Trojan
- hardware isolation
- information leakage