TY - GEN
T1 - The Need for Precise and Efficient Memory Capacity Budgeting
AU - Garg, Shaleen
AU - Kannan, Sudarsun
AU - Parashar, Manish
N1 - Funding Information:
We thank the anonymous reviewers for their insightful feedback. This work is partially supported by NSF CNS 1910593 award. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of NSF.
Publisher Copyright:
© 2020 ACM.
PY - 2020/9/28
Y1 - 2020/9/28
N2 - Modern high performance computing (HPC) systems pack hundreds of CPU cores to enable extreme parallelism. However, with increasing core counts, the effective per-core memory capacity is reducing. Reducing performance bottlenecks require precise monitoring and budgeting of application memory capacity requirements for attaining high performance, maximum resource efficiency, and low performance variability. Unfortunately, current operating systems (OS) and their toolsets are inaccurate, lack the capability to precisely measure the memory requirements of applications, forcing system administrators to either underestimate or over-provision memory, consequently compromising performance or resource efficiency, respectively. In this paper, we decipher the memory budgeting limitations in current OSes and their impact on both homogeneous and heterogeneous memory systems (e.g., nonvolatile memory). The limitations mainly stem from the mismatch between application-level and global memory accounting in the OS memory manager, fixing which can be prohibitively expensive at runtime. Our analysis of popular HPC workloads using widely-used memory budgeting strategies and deep instrumentation of the memory management layer reveals that imprecise budgeting can reduce performance by more than 1.65x and 2.05x in homogeneous and heterogeneous memory systems respectively. The program's memory requirement increases by up to 25x without significant performance gains. We also briefly describe our ongoing research approach to redesign the budgeting mechanisms in the OS.
AB - Modern high performance computing (HPC) systems pack hundreds of CPU cores to enable extreme parallelism. However, with increasing core counts, the effective per-core memory capacity is reducing. Reducing performance bottlenecks require precise monitoring and budgeting of application memory capacity requirements for attaining high performance, maximum resource efficiency, and low performance variability. Unfortunately, current operating systems (OS) and their toolsets are inaccurate, lack the capability to precisely measure the memory requirements of applications, forcing system administrators to either underestimate or over-provision memory, consequently compromising performance or resource efficiency, respectively. In this paper, we decipher the memory budgeting limitations in current OSes and their impact on both homogeneous and heterogeneous memory systems (e.g., nonvolatile memory). The limitations mainly stem from the mismatch between application-level and global memory accounting in the OS memory manager, fixing which can be prohibitively expensive at runtime. Our analysis of popular HPC workloads using widely-used memory budgeting strategies and deep instrumentation of the memory management layer reveals that imprecise budgeting can reduce performance by more than 1.65x and 2.05x in homogeneous and heterogeneous memory systems respectively. The program's memory requirement increases by up to 25x without significant performance gains. We also briefly describe our ongoing research approach to redesign the budgeting mechanisms in the OS.
KW - HPC
KW - Linux
KW - Memory
KW - Performance
KW - Resource Efficiency
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U2 - 10.1145/3422575.3422791
DO - 10.1145/3422575.3422791
M3 - Conference contribution
AN - SCOPUS:85103546008
T3 - ACM International Conference Proceeding Series
SP - 169
EP - 177
BT - MEMSYS 2020 - Proceedings of the International Symposium on Memory Systems
PB - Association for Computing Machinery
T2 - 2020 International Symposium on Memory Systems, MEMSYS 2020
Y2 - 28 September 2020 through 1 October 2020
ER -