Ultra-Fast (0.5-μm) CMOS Circuits in Fully Depleted SOI Films

Avid Kamgar, Steven J. Hillenius, Hong Ih L. Cong, R. L. Field, W. Stewart Lindenberger, George Celler, Lee E. Trimble, T. T. Sheng

Research output: Contribution to journalArticle

24 Scopus citations

Abstract

CMOS dual-modulus, divide by 128/129, prescaler circuits were built in thin Si films on SIMOX (Separation by IMplantation of OXygen) wafers. They operated at 6.2 GHz, the highest speed ever reported for a digital CMOS circuit, and 50% faster than the control circuits built in bulk Si. We made detailed electrical characterization of individual n- and p-channel transistors. The capacitances of the n and p diodes were also measured. Using these data in circuit simulations we determined that the gain in speed was primarily due to the decrease in the parasitic capacitances, in particular that of the source/drain junctions. We also measured ring-oscillator delay times, with minimum delay per stage of 34 ps.

Original languageEnglish (US)
Pages (from-to)640-647
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume39
Issue number3
DOIs
StatePublished - Jan 1 1992
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Kamgar, A., Hillenius, S. J., Cong, H. I. L., Field, R. L., Lindenberger, W. S., Celler, G., Trimble, L. E., & Sheng, T. T. (1992). Ultra-Fast (0.5-μm) CMOS Circuits in Fully Depleted SOI Films. IEEE Transactions on Electron Devices, 39(3), 640-647. https://doi.org/10.1109/16.123490