VLSI implementations of electronic neural networks: An example in character recognition

L. D. Jackel, B. Boser, H. P. Graf, J. S. Denker, Y. Le Cun, D. Henderson, O. Matan, Richard Howard, H. S. Baird

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

A large class of applications where theoretical considerations that promote high-accuracy classification result in constrained network architectures have been identified through a series of experiments in pattern recognition using neural net algorithms. These constrained nets can map onto appropriately designed hardware. The concepts learned from the pattern recognition experiments are discussed, and it is shown how they can be applied to chip design. A neural net chip for machine vision is described. The chip combines analog and digital processing and is reconfigurable.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on Systems, Man and Cybernetics
PublisherPubl by IEEE
Pages320-322
Number of pages3
ISBN (Print)0879425970
StatePublished - Nov 1 1990
Externally publishedYes
Event1990 IEEE International Conference on Systems, Man, and Cybernetics - Los Angeles, CA, USA
Duration: Nov 4 1990Nov 7 1990

Publication series

NameProceedings of the IEEE International Conference on Systems, Man and Cybernetics
ISSN (Print)0884-3627

Other

Other1990 IEEE International Conference on Systems, Man, and Cybernetics
CityLos Angeles, CA, USA
Period11/4/9011/7/90

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Hardware and Architecture

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